TMS626812B Datasheet - Texas Instruments

TMS626812B SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY

The TMS626812B is a high-speed, 16 777 216-bit synchronous dynamic random-access memory (SDRAM) device organized as follows: D Two banks of 1 048 576 words with 8 bits per word (TMS626812B) All inputs and outputs of the TMS626812B series are compatible with the LVTTL interface. The SDRAM employs sta.

TMS626812B 1 048 576 BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES SMOS693A OCTOBER 1997 REVISED APRIL 1998 D Organization 1048576 by 8 Bits by 2 Banks D 3.3-V Power Supply (± 10% Tolerance) D Two Banks for On-Chip Interleaving (Gapless Accesses) D High Bandwidth Up to 125-MHz Data Rates D CAS Latency (CL) Programmable to 2 or 3 Cycles From Column-Address Entry D Burst Sequence Programmable to Serial or Interleave D Burst Length Programmable to 1, 2.

TMS626812B Datasheet (594.73 KB)