Datasheet4U Logo Datasheet4U.com

74AHC74 Datasheet - nexperia

Dual D-type flip-flop

74AHC74 Features

* Balanced propagation delays

* All inputs have Schmitt-trigger actions

* Inputs accept voltages higher than VCC

* Input levels:

* For 74AHC74: CMOS level

* For 74AHCT74: TTL level

* ESD protection:

* HBM EIA/JESD22-A114E exceeds 2000 V

74AHC74 General Description

The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP).

74AHC74 Datasheet (251.31 KB)

Preview of 74AHC74 PDF

Datasheet Details

Part number:

74AHC74

Manufacturer:

nexperia ↗

File Size:

251.31 KB

Description:

Dual d-type flip-flop.
74AHC74; 74AHCT74 Dual D-type flip-flop with set and reset; positive-edge trigger Rev. 8 22 April 2020 Product data sheet 1. General des.

📁 Related Datasheet

74AHC74 Dual D-type flip-flop (NXP)

74AHC74-Q100 Dual D-type flip-flop (nexperia)

74AHC74BQ Dual D-type flip-flop (nexperia)

74AHC74D Dual D-type flip-flop (nexperia)

74AHC74PW Dual D-type flip-flop (nexperia)

74AHC00 Quad 2-input NAND gate (NXP)

74AHC00 QUADRUPLE 2-INPUT NAND GATES (Diodes)

74AHC00 Quad 2-input NAND gate (nexperia)

74AHC00-Q100 Quad 2-input NAND gate (nexperia)

74AHC00BQ Quad 2-input NAND gate (nexperia)

TAGS

74AHC74 Dual D-type flip-flop nexperia

Image Gallery

74AHC74 Datasheet Preview Page 2 74AHC74 Datasheet Preview Page 3

74AHC74 Distributor