74AUP1T50 Datasheet (nexperia)

74AUP1T50, Low-power buffer

The 74AUP1T50 provides the single buffer function.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V.

The 74AUP1T50 is designed for logic-level translation applications with input switching levels that accept 1.8 V low-voltage CMOS si

74AUP1T50 Features

* Wide supply voltage range from 2.3 V to 3.6 V

* High noise immunity

* ESD protection:

* HBM JESD22-A114F Class 3A exceeds 5000 V

* CDM JESD22-C101E exceeds 1000 V

* Low static power consumption; ICC = 1.5 μA (maximum)

* Latch-up performance e