TPT29511B Datasheet | 3PEAK

Features Description - Bidirectional Translator of I2C Applications and SMBus patible - Support Fast-mode Plus, up to 1-Mbps Data Rate - High-Impedance SCL1, SDA1, SCL2, and SDA2 Pins for EN = LOW - 1-V Pre-Charge on All SDA and SCL Lines Prevents Corruption during Live Board Insertion - Operating Power Supply Range from 2.3 V to 5.5 V - Low ICCChip Shutdown Current: 0.3 μA (typ) - Powered-Off High-Impedance I2C Pins - Built-in ΔV/Δt Rise Time Accelerator - ACK Error Protection to Avoid Direction Switching Error - ESD Protection: - 7-k V Human-Body Model - 1.5-k V Charged-Device Model Applications - Servers/Storages - Enterprise Switching - Tele Switching Equipment and Base Stations - Industrial Automation Equipment The TPT29511B device is a dual bidirectional I2C and SMBus hot-swap buffer with an enable (EN) input, and works from 2.3 V to 5.5 V VCC, which supports IO cards live insertion and removal from the backplane. The control circuit prevents the backplane-side I2C lines (in) from the other card-side I2C lines (out) until a stop mand or bus idle condition occurs on the backplane without bus contention on the card. When the connection is made, the TPT29511B provides bidirectional buffering, keeping the backplane and card capacitances isolated. The TPT29511B rise time accelerator circuitry allows the use of weaker DC pull-up currents while also meeting rise time requirements (ΔV/Δt > 0.6 V/us). The TPT29511B incorporates a digital enable input pin, which enables the device when asserted high and forces the device into a low current mode when asserted low, and an open-drain ready output pin, which indicates that the backplane and card sides are connected (high) or not (low). TPT29511B is available in the MSOP8 package, and is characterized from - 40°C to +125°C. Functional Block Diagram .3peak. 1 / 20 CA20240306A0 Hot-Swap I2C-BUS Buffer Table of Contents Features...