VDS7616A4A
Description
The VDS7616A4A are four-bank Synchronous DRAMs organized as 2,097152 words x 16 bits x 4 banks. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.
Key Features
- JEDEC standard LVTTL 3.3V power supply
- MRS Cycle with address key programs
- CAS Latency (2 &
- Burst Length (1,2,4,8,& full page) -Burst Type (sequential & Interleave)
- 4 banks operation
- All inputs are sampled at the positive edge of the system clock
- Burst Read single write operation
- Auto & Self refresh
- 4096 refresh cycle
- DQM for masking
Representative VDS7616A4A image (package may vary by manufacturer)
