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AK5322048 - 2097152 Word by 32 Bit CMOS Dynamic Random Access Memory

General Description

The Accutek AK53220482W high density memory module is a CMOS dynamic RAM organized in 2048 x 32 bit words.

The module consists of sixteen standard 1 Meg x 4 DRAMs in plastic SOJ packages.

Key Features

  • 2,097,152 x 32 bit organization.
  • 72 pad Single In-Line Module.
  • Multiple CAS and RAS lines allow x16 or x32 bit widths.
  • CAS-before-RAS, RAS-only or hidden refresh.
  • Operating free air temperature 0 C to 70 C.
  • Single 5 Volt Power Supply.
  • 2048 Refresh Cycles.
  • Available in Fast Page Mode EDO versions o o.

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Datasheet Details

Part number AK5322048
Manufacturer ACCUTEK
File Size 146.20 KB
Description 2097152 Word by 32 Bit CMOS Dynamic Random Access Memory
Datasheet download datasheet AK5322048 Datasheet

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Other Datasheets by ACCUTEK

Part Number Description
AK5322048BW 2097152 Word by 32 Bit CMOS Dynamic Random Access Memory
AK5322048N 2097152 Word by 32 Bit CMOS Dynamic Random Access Memory
AK532256AW 262144 Word by 32 Bit CMOS Dynamic Random Access Memory
AK532256W 262144 Word by 32 Bit CMOS Dynamic Random Access Memory
AK5321024N 1048576 Word by 32 Bit CMOS Dynamic Random Access Memory

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MICROCIRCUIT CORPORATION DESCRIPTION The Accutek AK53220482W high density memory module is a CMOS dynamic RAM organized in 2048 x 32 bit words. The module consists of sixteen standard 1 Meg x 4 DRAMs in plastic SOJ packages. The assembly has eight drams mounted on each side of a printed circuit board in a 72 pad leadless SIM configuration. This configuration allows socket-mounting of large quantities of memory in applications where high density and ease of inserting additional memory are important. The operation of the AK5322048 is identical to sixteen 1Meg x 4 Drams. There are four CAS lines and four RAS lines. On each bank of 1Meg x 32, independent byte control is accomplished by the four CAS lines, where each seperate CAS line controls two 1Meg x 4 Drams.