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AK5916384S - 16777216 Word by 9 Bit CMOS Dynamic Random Access Memory

General Description

The Accutek AK5916384S high density memory module is a CMOS random access memory organized in 16 Meg x 9 bit words.

Key Features

  • 16,777,216 x 9 bit organization.
  • Optional 30 Pad leadless SIM (Single In-Line Module) or 30 Pin leaded SIP (Single In-Line Package).
  • JEDEC standard pinout.
  • Common CAS and RAS control for the lower eight bits.
  • Separate PCAS control for D9 and Q9.
  • CAS-before-RAS refresh PIN.

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Datasheet Details

Part number AK5916384S
Manufacturer ACCUTEK
File Size 155.65 KB
Description 16777216 Word by 9 Bit CMOS Dynamic Random Access Memory
Datasheet download datasheet AK5916384S Datasheet

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Other Datasheets by ACCUTEK

Part Number Description
AK5916384G 16777216 Word by 9 Bit CMOS Dynamic Random Access Memory
AK591024AG 1048576 Word x 9 Bit CMOS Dynamic Random Access Memory
AK591024AS 1048576 Word x 9 Bit CMOS Dynamic Random Access Memory
AK59256AG 262144 Word by 32 Bit CMOS Dynamic Random Access Memory
AK59256AS 262144 Word by 32 Bit CMOS Dynamic Random Access Memory

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MICROCIRCUIT CORPORATION DESCRIPTION The Accutek AK5916384S high density memory module is a CMOS random access memory organized in 16 Meg x 9 bit words. The assembly consists of nine 16 Meg x 1 DRAMs in plastic SOJ packages mounted on the front side of a printed circuit board in 30 pad SIM (leadless) or 30 pin SIP (leaded) configuration. The module is only 0.8 inch high (same height as standard 1 Meg modules), making it ideally suited for applications with low height restrictions. The operation of the AK5916384 is identical to nine 16 Meg x 1 dynamic RAMs. For the lower eight bits data input is tied to data output and brought out separately for each device, with common RAS, CAS and WE control. This common I/O feature dictates the use of early-write cycles to prevent contention of D and Q.