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ACD80800 Datasheet PDF

ACD ACD80800

The ACD80800 serves as an Address Resolution Logic for ACD’s switch controller chips (ACD82124, ACD82012 etc.) through a glueless ARL interface. It automatically builds up an address table and can map up to 8K MAC addresses into their associated ports. The ACD80800 can work without a CPU in a unmanaged switch system, or with a CPU and an ACD MIB (ACD80900 Management Information Base).
Part No. ACD80800
Datasheet ACD80800 Download
Manufacturer ACD
Description Address Resolution Logic
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ACD80800 datasheet page 1 preview

FEATURES

3. FUNCTIONAL

DESCRIPTION

4. PIN

DESCRIPTION

5. INTERFACE

DESCRIPTION

6. REGISTER

DESCRIPTION

7. COMMAND

DESCRIPTION

8. TIMING

DESCRIPTION

9. ELECTRICAL SPECIFICATION ACD Confidential. Do Not Reproduce. Use under Non-Disclosure Agreement only. 10. PACKAGING 2 Data Sheet: ACD80800 A direct input/output interface is integrated to support a management CPU. The CPU can configure the operation mode of the ACD80800, learn all the addresses in the address table, add new addresses into the table, control security or filtering features of each address entry, etc. The ACD80800 is designed with such a high performance that, it will never slow down the frame switching operation conducted by the ACD’s switch controllers. Together with the non-blocking architecture of the ACD’s switch controllers, the chip set (a ACD switch controller plus the ACD80800, plus ACD80900 in a managed switch system) can provide wire speed forwarding rate under any type of traffic load.
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