Description
of external circuits, application circuits, software and other related information contained in this document are provided only to illustrate the operation and application examples of the semiconductor products.
Features
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Maximum conversion rate : Input range : Input polarity : 6ch. sampling : Offset DAC : 35MSPS / ch. 1.26Vpp(typ. )@CDS mode/ 1.2V(typ. )@Clamp mode Negative polarity only CDS circuit (Correlated Double Sampling) Separate 6 channel 8bit DAC with automatic black offset loop. PGA : Linearity : LVDS output : Timing Generator : 4 line serial register Gain range 0dB~18dB , 6bit, 6 channel DNL =.
- 1LSB(min. ), +1LSB(max. ) Monotone guarantee 5LVDS-Data+LVDS-Clock Generate.