AMCC S2042
The S2042 and S2043 transmitter and receiver pair are designed to perform high-speed serial data transmission over fiber optic or coaxial cable interfaces conforming to the requirements of the ANSI X3T11 Fibre Channel specification. The chipset is selectable to 1062, 531 or 266 Mbit/s data rates with associated 10- or 20-bit data word. The chipset performs parallel-to-serial and serial-toparallel conversion and framing for block-encoded data.| Part No. | S2042 |
|---|---|
| Datasheet | S2042 Download |
| Manufacturer | AMCC |
| Description | HIGH PERFORMANCE SERIAL INTERFACE CIRCUITS |
| Buy | Stock & Price |
GENERAL DESCRIPTION
S2042/S2043 S2042/S2043FEATURES
● Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards● S2042 transmitter incorporates phase-locked loop (PLL) providing clock synthesis from low-speed reference
● S2043 receiver PLL configured for clock and data recovery
● 1062, 531 and 266 Mb/s operation
● 10- or 20-bit parallel TTL compatible interface
● 1 watt typical power dissipation for chipset
● +3.3/+5V power supply
● Low-jitter serial PECL compatible interface
● Lock detect
● Local loopback
● 10mm x 10mm 52 PQFP package
● Fibre Channel framing performed by receiver
● Continuous downstream clocking from receiver
● TTL compatible outputs possible with +5V I/O power supply The S2042 on-chip PLL synthesizes the highspeed clock from a low-speed reference. The S2043 on-chip PLL synchronizes directly to incoming digital signals to receive the data stream. The transmitter and receiver each support differential PECL-compatible I/O for fiber optic component interfaces, to minimize crosstalk and maximize data integrity.
