S2052 Description
The S2052 transmitter and receiver chip is designed to perform high-speed serial data transmission over fiber optic or coaxial cable interfaces conforming to the requirements of the ANSI X3T11 Fibre Channel specification. The chip runs at 1250.0, and 1062.5 Mbit/s data rates with associated 10-bit data word. The chip performs parallel-to-serial and serial-to-parallel conversion and framing for block-encoded data.
S2052 Key Features
- Functionally pliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards and IEEE 802.3Z Gigabit E
S2052 Applications
- Transmitter incorporates phase-locked loop (PLL) providing clock synthesis from low-speed reference
- Receiver PLL configured for clock and data recovery