Description
The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities.
Features
- PCI 2.1 Compliant Master/Slave Device Full 132 Mbytes/sec Transfer Rate PCI Bus Operation DC to 33 Mhz 8/16/32 Bit Add-On User Bus Four Definable Pass-Thru Regions Two 32 Byte FIFOs Sync/Async Add-On Bus Operation Mail Box Registers w/Byte Level Status Direct Mail Box Data Strobe/Interrupts Big/Little Endian Conversions Direct PCI & Add-On Interrupt Pins Boo.