AM486DX5 Datasheet | AMD

Features - 3-V core with 5-V tolerant I/O - Wide range of chipsets and support available through the AMD Fusion E86SM Program s 168-Pin PGA Package or 208-Pin SQFP Package s IEEE 1149.1 JTAG Boundary-Scan patibility GENERAL DESCRIPTION The Enhanced Am486®DX Microprocessor Family is an hanced Am486DX microprocessor family. This results in addition to the AMD E86 family of embedded micropro- decreased development costs and improved time to mar- cessors. This new family enhances system performance ket. by incorporating a 16-Kbyte write-back cache to the existing flexible clock control and enhanced SMM features of a 486 CPU. Table 1 shows available processors in the Enhanced Am486DX microprocessor family. See page 54 for information on how these parts differ from other Am486 The Enhanced Am486DX microprocessor family en- processors. ables write-back configuration through software and cacheable access control. On-chip cache lines are con- figurable as either write-through or write-back. The CPU clock control feature permits the CPU clock to be stopped Table 1. Clocking Options under controlled conditions, allowing reduced power consumption during system inactivity. The SMM function Operating Frequency Input Clock Available Package is implemented with an industry standard two-pin inter- mface. .co Since the Enhanced Am486DX microprocessor family is supported as an embedded product, customers can rely t4uon continued cost reduction, a long-term supply, and extended temperature products. ee In addition, customers have access to a large selection hof inexpensive development tools, pilers, and schipsets. A large number of PC operating systems and ta Real Time Operating Systems (RTOS) support the En- Am486DX5-133 Am486DX5-133 Am486DX4-100 Am486DX4-100 Am486DX2-66 Am486DX2-66 .da This document contains information on a product under development at Advanced Micro Devices. The information is intended...