ANE4 Datasheet | AMI

Description ANEx is a family of AND-NOR circuits consisting of three 3-input AND gates into a 3-input NOR gate. Logic Symbol Truth Table A ANEx B ABCDE FGH I Q D HHHXXXXXX L XXXHHHXXX L G XXXXXXHHH L All other binations HDL Syntax Verilog ANEx inst_name (Q, A, B, C, D, E, F, G, H, I); VHDL inst_name: ANEx port map (Q, A, B, C, D, E, F, G, H, I); Pin Loading Pin Name A B C D E F G H I ANE2 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Equivalent Loads ANE4 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 ANE6 2.1 2.1 2.1 2.1 2.1 2.1 2.1 2.1 2.1 ® 3-34 $1([ ® $0,+- PLFURQ &026 - DWH $UUD Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (n A) EQLpd (Eq-load) ANE2 ANE6 23.2 a. See page 2-15 for power equation. Core Logic 3-35 $1([ ®...