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IDQS3 - CMOS Gate Array

General Description

IDQS3 is a crystal oscillator input receiver pad piece.

QC is a non-inverting, CMOS-level schmitt trigger clock input buffer.

QO is the output to the ODQFE01M.

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Datasheet Details

Part number IDQS3
Manufacturer AMI
File Size 25.59 KB
Description CMOS Gate Array
Datasheet download datasheet IDQS3 Datasheet

Full PDF Text Transcription for IDQS3 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for IDQS3. For precise diagrams, and layout, please refer to the original PDF.

,'46 ® $0,+*  PLFURQ &026 *DWH $UUD Description IDQS3 is a crystal oscillator input receiver pad piece. QC is a non-inverting, CMOS-level schmitt trigger clock input...

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d piece. QC is a non-inverting, CMOS-level schmitt trigger clock input buffer. QO is the output to the ODQFE01M. PADM is the bond pad from the Xtal-in. Logic Symbol Logic Schematic IDQS3 QC P PADM D QO Truth Table PADM L H QC L H QO L H Xtal-in P D IDQS3 QC E QC E QI QO Pin Loading Load PADM 4.90 pF ODQFE01M Xtal-out HDL Syntax Verilog .................... IDQS3 inst_name (QC, QO, PADM); VHDL...................... inst_name: IDQS3 port map (QC, QO, PADM); Power Characteristics Parameter Static IDD (TJ = 85°C) EQLpd See page 2-15 for power equation. Value TBD 18.