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INV2 - CMOS Gate Array

This page provides the datasheet information for the INV2, a member of the INV1 CMOS Gate Array family.

Datasheet Summary

Description

INVx is a family of inverters which perform the logical NOT function.

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Datasheet Details

Part number INV2
Manufacturer AMI
File Size 24.23 KB
Description CMOS Gate Array
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Full PDF Text Transcription

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Core Logic ,19[ $0,+*  PLFURQ &026 *DWH $UUD Description INVx is a family of inverters which perform the logical NOT function. Logic Symbol Truth Table INVx AQ AQ AQ LH HL ® HDL Syntax Verilog .................... INVx inst_name (Q, A); VHDL...................... inst_name: INVx port map (Q, A); Pin Loading Equivalent Loads Pin Name INV1 INV2 INV3 INV4 A 1.0 2.1 3.2 4.2 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) INV1 1.0 TBD 0.6 INV2 1.0 TBD 0.6 INV3 2.0 TBD 1.2 INV4 2.0 TBD 1.2 INV5 3.0 TBD 1.8 INV6 3.0 TBD 1.8 a. See page 2-15 power equation INV5 5.2 INV6 6.3 3-126 ® Propagation Delays (ns) Conditions: TJ = 25°C, VDD = 5.
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