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ODCXIP08 - CMOS Gate Array

Download the ODCXIP08 datasheet PDF. This datasheet also covers the ODCXIP01 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

General Description

ODCXIPxx is a family of 1 to 8 mA, inverting, CMOS-level, output buffer pieces with P-channel, open-drains (pull-up).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ODCXIP01-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ODCXIP08
Manufacturer AMI
File Size 24.25 KB
Description CMOS Gate Array
Datasheet download datasheet ODCXIP08 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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2'&;,3[[ ® $0,+*  PLFURQ &026 *DWH $UUD Description ODCXIPxx is a family of 1 to 8 mA, inverting, CMOS-level, output buffer pieces with P-channel, open-drains (pull-up). Logic Symbol Truth Table ODCXIPxx A PADM A PADM LH HZ Z = High Impedance HDL Syntax Verilog .................... ODCXIPxx inst_name (PADM, A); VHDL...................... inst_name: ODCXIPxx port map (PADM, A); Pin Loading Pin Name A (eq-load) PADM (pF) ODCXIP01 2.8 4.92 Load ODCXIP02 ODCXIP04 2.8 2.8 4.92 4.92 ODCXIP08 3.9 4.93 Power Characteristics Cell Output Drive (mA) ODCXIP01 1 ODCXIP02 2 ODCXIP04 4 ODCXIP08 8 a. See page 2-15 for power equation. Power Characteristicsa Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) TBD 148.8 TBD 153.6 TBD 162.0 TBD 178.