ODTSXX08 - CMOS Gate Array

This page provides the datasheet information for the ODTSXX08, a member of the ODTSXX04 CMOS Gate Array family.

Datasheet Summary

Description

ODTSXXxx is a family of 4 to 24 mA, non-inverting, TTL-level, output buffer pieces with controlled slew rate outputs.

AMI

📥 Download Datasheet

ODTSXX08 CMOS Gate Array by AMI - Datasheet Preview — Datasheet preview – ODTSXX08

Datasheet Details

Part number	ODTSXX08
Manufacturer	AMI
File Size	23.70 KB
Description	CMOS Gate Array
Datasheet	ODTSXX08 Datasheet
Additional preview pages of the ODTSXX08 datasheet.

📁 Similar Datasheet

Other Datasheets by AMI

ODTSXX04 - CMOS Gate Array
ODTSXX12 - CMOS Gate Array
ODTSXX16 - CMOS Gate Array
ODTSXX24 - CMOS Gate Array
ODTSXE04 - CMOS Gate Array
ODTSXE08 - CMOS Gate Array
ODTSXE12 - CMOS Gate Array
ODTSXE16 - CMOS Gate Array

Full PDF Text Transcription

Click to expand full text

2'76;;[[ ® $0,+* PLFURQ &026 *DWH $UUD Description ODTSXXxx is a family of 4 to 24 mA, non-inverting, TTL-level, output buffer pieces with controlled slew rate outputs. Logic Symbol Truth Table ODTSXXxx A SL PADM A PADM LL HH HDL Syntax Verilog .................... ODTSXXxx inst_name (PADM, A); VHDL...................... inst_name: ODTSXXxx port map (PADM, A); Pin Loading Pin Name A (eq-load) ODTSXX04 9.3 Power Characteristics Cell Output Drive (mA) ODTSXX04 4 ODTSXX08 8 ODTSXX12 12 ODTSXX16 16 ODTSXX24 24 a. See page 2-15 for power equation. ODTSXX08 9.3 Load ODTSXX12 9.3 ODTSXX16 9.3 Power Characteristicsa Static IDD (TJ = 85°C) (nA) TBD EQLpd (Eq-load) 198.6 TBD 220.0 TBD 240.8 TBD 263.6 TBD 282.3 ODTSXX24 11.

Published: Mar 13, 2018 |