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Core Logic
21'[
®
$0,+* PLFURQ &026 *DWH $UUD
Description
ONDx is a family of OR-NAND circuits consisting of two 3-input OR gates and one 2-input OR gate into a 3-input NAND gate.
Logic Symbol
Truth Table
A ONDx
B ABCDE FGHQ
C
D L L LXXXXXH E Q XXXL L LXXH
F XXXXXXL LH
G
All other combinations
L
H
HDL Syntax Verilog .................... ONDx inst_name (Q, A, B, C, D, E, F, G, H); VHDL...................... inst_name: ONDx port map (Q, A, B, C, D, E, F, G, H);
Pin Loading
Pin Name
A B C D E F G H
OND2 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0
Equivalent Loads OND4 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0
OND6 2.1 2.1 2.1 2.1 2.1 2.1 2.1 2.
OND2 Datasheet
