OND2 Datasheet | AMI

Core Logic 21'[ ® $0,+- PLFURQ &026 - DWH $UUD Description ONDx is a family of OR-NAND circuits consisting of two 3-input OR gates and one 2-input OR gate into a 3-input NAND gate. Logic Symbol Truth Table A ONDx B ABCDE FGHQ D L L LXXXXXH E Q XXXL L LXXH F XXXXXXL LH All other binations HDL Syntax Verilog .................... ONDx inst_name (Q, A, B, C, D, E, F, G, H); VHDL...................... inst_name: ONDx port map (Q, A, B, C, D, E, F, G, H); Pin Loading Pin Name A B C D E F G H OND2 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Equivalent Loads OND4 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 OND6 2.1 2.1 2.1 2.1 2.1 2.1 2.1 2.1 3-207 21'[ $0,+- PLFURQ &026 - DWH $UUD Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (n A) EQLpd...