A67P0636 - (A67P0636 / A67P1618) Pipelined ZeBL SRAM

This page provides the datasheet information for the A67P0636, a member of the A67P1618 (A67P0636 / A67P1618) Pipelined ZeBL SRAM family.

Product Overview

AMIC Technology

Part number	A67P0636
Manufacturer	AMIC Technology
File Size	296.38 KB
Description	(A67P0636 / A67P1618) Pipelined ZeBL SRAM
Datasheet	A67P0636 Datasheet
Additional preview pages of the A67P0636 datasheet.

The AMIC Zero Bus Latency (ZeBLTM) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process.

The A67P1618, A67P0636 SRAMs integrate a 2M X 18, 1M X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter.

Fast access time: 2.6/2.8/3.2/3.5/3.8/4.2 (250/227/200/166/150/133MHz) Zero Bus Latency between READ and WRITE cycles allows 100% bus utilization Signal +2.5V ± 5% power supply Individual Byte Write control capability Clock enable ( CEN ) pin to enable clock and suspend operations Clock-controlled and registered address, data and control signals Registered output for pipelined.

Other Datasheets by AMIC Technology

Published: Dec 1, 2006 |