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LP62S16128CU-70LLT - 128K X 16 BIT LOW VOLTAGE CMOS SRAM

Description

The LP62S16128C-T is a low operating current 2,097,152-bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.7V to 3.6V.

It is built using AMIC's high performance CMOS process.

Features

  • n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max. ) n Current: Very low power version: Operating: 55ns 40mA (max. ) 70ns 35mA (max. ) Standby: 10µA (max. ) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2V (min. ) n Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages 128K X 16 BIT LOW.

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Datasheet Details

Part number LP62S16128CU-70LLT
Manufacturer AMIC Technology
File Size 165.76 KB
Description 128K X 16 BIT LOW VOLTAGE CMOS SRAM
Datasheet download datasheet LP62S16128CU-70LLT Datasheet

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Full PDF Text Transcription

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LP62S16128C-T Series Preliminary Document Title 128K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 128K X 16 BIT LOW VOLTAGE CMOS SRAM History Initial issue Issue Date April 26, 2002 Remark Preliminary PRELIMINARY (April, 2001, Version 0.0) 1 AMIC Technology, Inc. LP62S16128C-T Series Preliminary Features n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max.) n Current: Very low power version: Operating: 55ns 40mA (max.) 70ns 35mA (max.) Standby: 10µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2V (min.
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