Datasheet Summary
LP62S2048A-I Series
Preliminary
Document Title 256K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History
Rev. No.
256K X 8 BIT LOW VOLTAGE CMOS SRAM
History
Initial issue
Issue Date
June 24, 2002
Remark
Preliminary
PRELIMINARY
(June, 2002, Version 0.0)
AMIC Technology, Inc.
LP62S2048A-I Series
Preliminary
Features n Power supply range: 2.7V to 3.3V n Access times: 55/70 ns (max.) n Current: Very low power version: Operating: 55ns: 25mA (max.) 70ns: 20mA (max.) Standby: 10µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-patible n mon I/O using three-state output n Output enable and two chip enable inputs for easy...