AT32A403A Datasheet | ARTERY

Feature - AEC Q-100 Grade 2 certification - Core: ARM® 32-bit Cortex®-M4 CPU with - 200 MHz maximum frequency, with a memory protection unit (MPU), single-cycle multiplication and hardware division - Floating point unit (FPU) - DSP instructions - Memories - 256 to 1024 KBytes of internal Flash memory - s Lib: configurable part of main Flash set as a libruary area with code executable but secured, non-readable - SPIM interface: Extra interfacing up to 16 Mbytes of the external SPI Flash - Up to 96+128 KBytes of SRAM - External memory controller (XMC) with 16bit data bus supporting multiplexed PSRAM/NOR and NAND memories - XMC as LCD parallel interface, patible with 8080/6800 modes - Power control (PWC) - 2.6 to 3.6 V application supply - Power on reset (POR), low voltage reset (LVR), and power voltage monitoring (PVM) - Low power modes: Sleep, Deepsleep, and Standby modes - VBAT supply for LEXT, RTC, and forty-two 16-bit battery powered registers (BPR) - Clock and reset management (CRM) - 4 to 25 MHz crystal oscillator (HEXT) - 48 MHz internal factory-trimmed high speed internal clock (HICK), 1 % accuracy at TA = 25 °C and 2.5 % accuracy at TA = -40 to +105 °C, with automaitc clock calibration (ACC) - 32 k Hz crystal oscillator (LEXT) - Low speed internal clock (LICK) - Analog - 3 x 12-bit 2 MSPS A/D converters, up to 16 input channels - Temperature sensor (VTS) and internal reference voltage (VINTRV) - 2 x 12-bit D/A converters - DMA: 14-channel DMA controller - Up to 80 fast GPIOs - All mappable on 16 external interrupts (EXINT) - Almost all 5 V-tolerant - Up to 17 timers (TMR) - Up to 2 x 16-bit motor control PWM advanced timers with dead-time generator and emergency brake - Up to 8 x 16-bit + 2 x 32-bit timers, each with 4 IC/OC/PWM or pulse counter and quadrature encoder input - 2 x 16-bit basic timers to drive the DAC - 2 x watchdog timers (general WDT and windowed WWDT) - Sys Tick timer: a 24-bit downcounter - Up to 21 munication interfaces - Up to 3 x I2C...