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AT32A403A Series Datasheet
ARM®-based 32-bit Cortex®-M4 MCU+FPU with 256 to 1024 KB Flash, sLib, 17 timers, 3 ADCs, 21 communication interfaces (USBFS and Ethernet) Feature
AEC Q-100 Grade 2 certification Core: ARM® 32-bit Cortex®-M4 CPU with
FPU
− 200 MHz maximum frequency, with a memory protection unit (MPU), single-cycle multiplication and hardware division
− Floating point unit (FPU)
− DSP instructions Memories
− 256 to 1024 KBytes of internal Flash memory
− sLib: configurable part of main Flash set as a libruary area with code executable but secured, non-readable
− SPIM interface: Extra interfacing up to 16 Mbytes of the external SPI Flash
− Up to 96+128 KBytes of SRAM
− External memory controller (XMC) with 16bit data bus supporting multiplexed PSRAM/NOR and NAND memories
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