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AT32A423 Series Datasheet
ARM®-based 32-bit Cortex®-M4 MCU+FPU, 64 to 256 KB Flash, sLib, 15 timers, 1 ADC, 18 communication interfaces (2 CAN and 1 OTGFS) Features
AEC Q-100 certification
Core: ARM® 32-bit Cortex®-M4 CPU with FPU
− 150 MHz maximum frequency, with a memory protection unit (MPU), single-cycle multiplication and hardware division
− Floating point unit (FPU)
− DSP instructions
Memories
− 64 to 256 Kbytes of Flash memory
− 20 Kbytes of boot memory used as a Bootloader or as a general instruction/data memory (one-time-configurable)
− sLib: configurable part of main Flash as a library area with code executable but secured, non-readable
− Up to 48 Kbytes of SRAM
− External memory controller (XMC) with 16bit data bus supporting multiplexed PSRAM and NOR memories
XMC as L