ASI MT5C6408
The MT5C6408, 8K x 8 SRAM, employs high-speed, low-power CMOS technology, eliminating the need for clocks or refreshing. These SRAM’s have equal access and cycle times. For flexibility in high-speed memory applications, Austin Semiconductor offers dual chip enables (CE1\, CE2) and output enable (OE\) capability.| Part No. | MT5C6408 |
|---|---|
| Datasheet | MT5C6408 Download |
| Manufacturer |  ASI |
| Description | 8K x 8 SRAM |
| Buy | Stock & Price |
FEATURES
● High Speed: 12, 15, 20, 25, 35, 45, 55, and 70ns● Battery Backup: 2V data retention
● High-performance, low-power CMOS double-metal process
● Single +5V (+10%) Power Supply
● Easy memory expansion with CE1\ and CE2
● All inputs and outputs are TTL compatible 12 13 14 15 16 17 18 28-Pin Flat Pack (F) NC A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ1 DQ2 DQ3 Vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 DQ6 DQ5 DQ4 DQ3 Vss DQ2 DQ1 OPTIONS
● Timing 12ns access 15ns access 20ns access 25ns access 35ns access 45ns access 55ns access 70ns access
● Package(s) Ceramic DIP (300 mil) Ceramic LCC Ceramic Flatpack MARKING -12 -15 -20 -25 -35 -45 -55* -70* Vcc WE\ CE2 A8 A9 A11 OE\ A10 CE1\ DQ8 DQ7 DQ6 DQ5 DQ4
GENERAL DESCRIPTION
No. 108 No. 204 No. 302 These SRAM’s have equal access and cycle times. These enhancements can place the outputs in High-Z for additional flexibility in system design. Writing to these devices is accomplished when write enable (WE\) and CE1\ inputs are both LOW and CE2 is HIGH.
