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Features
• Utilizes the AVR® RISC Architecture • AVR – High-performance and Low-power RISC Architecture
– 118 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Up to 10 MIPS Throughput at 10 MHz • Data and Non-volatile Program Memory – 2K Bytes of In-System Programmable Flash
Endurance 1,000 Write/Erase Cycles – 128 Bytes of SRAM – 128 Bytes of In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles – Programming Lock for Flash Program and EEPROM Data Security • Peripheral Features – One 8-bit Timer/Counter with Separate Prescaler – One 16-bit Timer/Counter with Separate Prescaler,
Compare, Capture Modes and 8-, 9-, or 10-bit PWM – On-chip Analog Comparator – Programmable Watchdog Timer with On-chip Oscillator – SPI Serial In
AT90S2313 Datasheet
