M67025E Datasheet | Atmel

Features - - - - - - - - - - - - - Fast .. Access Time: 30/45 ns Wide Temperature Range: -55 °C to +125°C Separate Upper Byte and Lower Byte Control for Multiplexed Bus patibility Expandable Data Bus to 32 bits or More Using Master/Slave Chip Select When Using More Than One Device On-chip Arbitration Logic Versatile Pin Select for Master or Slave: - M/S = H for Busy Output Flag On Master - M/S = L for Busy Input Flag On Slave INT Flag for Port to Port munication Full Hardware Support of Semaphore Signaling Between Ports Fully Asynchronous Operation From Either Port Battery Back-up Operation: 2V Data Retention TTL patible Single 5V + 10% Power Supply QML Q and V with SMD 5962-91617 Rad. Tolerant High Speed 8 Kb x 16 Dual Port RAM M67025E Introduction The M67025E is a very low power CMOS dual port static RAM organized as 8192 bit × 16. The product is designed to be used as a stand-alone 16-bit dual port RAM or as a bination MASTER/SLAVE dual port for 32-bit or more width systems. The Atmel MASTER/SLAVE dual port approach in memory system applications results in full speed, error free operation without the need of an additional discrete logic. Master and slave devices provide two independent ports with separate control, address and I/O pins that permit independent, asynchronous access for reads and writes to any location in the memory. An automatic power down feature controlled by CS permits the on-chip circuitry of each port in order to enter a very low stand by power mode. Using an array of eight transistors (8T) memory cell, the M67025E bines an extremely low standby supply current (typ = 1.0 µA) with a fast access time at 30 ns over the full temperature range. All versions offer battery backup data retention capability with a typical power consumption at less than 5 µW. For military/space applications that demand superior levels of performance and reliability the M67025E is processed according to the methods of the latest revision of the MIL PRF 38635 (Q and V)...