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M67025E - Tolerant High Speed 8 Kb x 16 Dual Port RAM

General Description

Left Port CSL R/WL OEL A0L 12L Right Port CSR R/WR OER A0R 12R I/O0R 15R SEMR UBR LBR INTR BUSYR M/S Vcc GND Names Chip select Read/Write Enable Output Enable Address Data Input/Output Semaphore Enable Upper Byte Select Lower Byte Select Interrupt Flag Busy Flag Maste

Key Features

  • Fast www. DataSheet4U. com Access Time: 30/45 ns Wide Temperature Range: -55 °C to +125°C Separate Upper Byte and Lower Byte Control for Multiplexed Bus Compatibility Expandable Data Bus to 32 bits or More Using Master/Slave Chip Select When Using More Than One Device On-chip Arbitration Logic Versatile Pin Select for Master or Slave:.
  • M/S = H for Busy Output F.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Features • • • • • • • • • • • • • Fast www.DataSheet4U.com Access Time: 30/45 ns Wide Temperature Range: -55 °C to +125°C Separate Upper Byte and Lower Byte Control for Multiplexed Bus Compatibility Expandable Data Bus to 32 bits or More Using Master/Slave Chip Select When Using More Than One Device On-chip Arbitration Logic Versatile Pin Select for Master or Slave: – M/S = H for Busy Output Flag On Master – M/S = L for Busy Input Flag On Slave INT Flag for Port to Port Communication Full Hardware Support of Semaphore Signaling Between Ports Fully Asynchronous Operation From Either Port Battery Back-up Operation: 2V Data Retention TTL Compatible Single 5V + 10% Power Supply QML Q and V with SMD 5962-91617 Rad.