TS8308500 Datasheet | Atmel

.. Main Features - - - - - - - - - - - - 8-bit Resolution 500 Msps (min) Sampling Rate Power Consumption: 3.8W Typ 500 m Vpp Differential or Single-ended Analog Inputs Differential or Single-ended 50Ω ECL patible Clock Inputs ECL or LVDS/HSTL Output patibility ADC Gain Adjust Data Ready Output with Asynchronous Reset Gray or Binary Selectable Output Data; NRZ Output Mode Enhanced CBGA Package with Ceramic Lid Evaluation Board: TSEV8308500GL (Detailed Specification on Request) Demultiplexer TS81102G0: panion Device Available ADC 8-bit 500 Msps TS8308500 Performance - 1.3 GHz Full Power Input Bandwidth - Band Flatness: 0.5 d B up to 500 MHz - SINAD = 45 d B (7.2 Effective Bits), SFDR = 54 d Bc at FS = 500 Msps, FIN = 20 MHz - SINAD = 43 d B (7.1 Effective Bits), SFDR = 53 d Bc at FS = 500 Msps, FIN = 250 MHz - SINAD = 42 d B (7.0 Effective Bits), SFDR = 52 d Bc at FS = 500 Msps, FIN = 500 MHz (-3 d B FS) - 2-tone IMD: TBD (199.5 MHz, 200.5 MHz) at 500 Msps - DNL = ±0.3 LSB INL = ±0.7 LSB - Low Bit Error Rate (10-13) at 500 Msps, Tj = 90°C Applications - - - - Digital Sampling Oscilloscopes Satellite Receiver Electronic Countermeasures/Electronic Warfare Direct RF Down-conversion Screening - - Atmel Standard Screening Level Temperature Range: - - 0°C < Tc; Tj < +90°C -40°C < Tc ; Tj < + 110°C Description The TS8308500 is a monolithic 8-bit analog-to-digital converter, designed for digitizing wide bandwidth analog signals at very high sampling rates of up to 500 Msps. The TS8308500 is using an innovative architecture, including an on-chip Sample and Hold (S/H), and is fabricated with an advanced high-speed bipolar process. The on-chip S/H has a 1.3 GHz full power input bandwidth, providing excellent dynamic performance in undersampling applications (High IF digitizing). Rev. 2193A- BDC- 0 2193A- BDC- 04/03 6/03 Functional Description Block...