AT89LP51
Overview
- 8-bit Microcontroller Compatible with 8051 Products
- Enhanced 8051 Architecture - Single Clock Cycle per Byte Fetch - 12 Clock per Machine Cycle Compatibility Mode - Up to 20 MIPS Throughput at 20 MHz Clock Frequency - Fully Static Operation: 0 Hz to 20 MHz - On-chip 2-cycle Hardware Multiplier - 256 x 8 Internal RAM - External Data/Program Memory Interface - Dual Data Pointers - 4-level Interrupt Priority
- Nonvolatile Program and Data Memory - 4K/8K Bytes of In-System Programmable (ISP) Flash Program Memory - 256 Bytes of Flash Data Memory - 256-byte User Signature Array - Endurance: 10,000 Write/Erase Cycles - Serial Interface for Program Downloading - 64-byte Fast Page Programming Mode - 3-level Program Memory Lock for Software Security - In-Application Programming of Program Memory
- Peripheral Features - Three 16-bit Timer/Counters with Clock Out Modes - Enhanced UART
- Automatic Address Recognition
- Framing Error Detection
- SPI and TWI Emulation Modes - Programmable Watchdog Timer with Software Reset and Prescaler
- Special Microcontroller Features - Brown-out Detection and Power-on Reset with Power-off Flag - Selectable Polarity External Reset Pin - Low Power Idle and Power-down Modes - Interrupt Recovery from Power-down Mode - Internal 1.8432 MHz Auxiliary Oscillator
- I/O and Packages - Up to 36 Programmable I/O Lines - Green (Pb/Halide-free) Packages
- 40-lead PDIP
