AT89LP51IC2
Overview
- 8-bit Microcontroller Compatible with 8051 Products
- Enhanced 8051 Architecture - Single Clock Cycle per Byte Fetch - 12 Clock per Machine Cycle Compatibility Mode - Up to 20 MIPS Throughput at 20 MHz Clock Frequency - Fully Static Operation: 0 Hz to 20 MHz - On-chip 2-cycle Hardware Multiplier - 16x16 Multiply-Accumulate Unit - 256 x 8 Internal RAM - On-chip 1152 Bytes Expanded RAM (ERAM)
- Software Selectable Size (0, 256, 512, 768, 1024 or 1152 Bytes) - Dual Data Pointers - 4-level Interrupt Priority
- Nonvolatile Program and Data Memory - 24KB/32KB of In-System Programmable (ISP) Flash Program Memory - 512-byte User Signature Array - Endurance: 10,000 Write/Erase Cycles - Serial Interface for Program Downloading - 2KB Boot ROM Contains Low Level Flash Programming Routines and a Default Serial Bootloader
- Peripheral Features - Three 16-bit Enhanced Timer/Counters - Seven 8-bit PWM Outputs - 16-bit Programmable Counter Array
- High Speed Output, Compare/Capture
- Pulse Width Modulation, Watchdog Timer Capabilities - Enhanced UART with Automatic Address Recognition and Framing Error Detection - Enhanced Master/Slave SPI with Double-buffered Send/Receive - Two Wire Interface 400K bit/s - Programmable Watchdog Timer with Software Reset - 8 General-purpose Interrupt and Keyboard Interface Pins
- Special Microcontroller Features - Dual Oscillator Support: Crystal, 32 kHz Crystal, 8 MHz Internal (AT89LP51IC2) - Two-wire On-Chip Debug Interface - Brown-out Detection and Power-on Reset with Power-off Flag - Selectable Polarity External Reset Pin - Low Power Idle and Power-down Modes - Interrupt Recovery from Power-down Mode - 8-bit Clock Prescaler
- I/O and Packages - Up to 40 Programmable I/O Lines - Green (Pb/Halide-free) PLCC44, VQFP44, QFN44. PDIP40 - Configurable I/O Modes
- Quasi-bidirectional (80C51 Style), Input-only (Tristate)
