ATmega32
Overview
- High-performance, Low-power Atmel®AVR® 8-bit Microcontroller
- Advanced RISC Architecture - 131 Powerful Instructions - Most Single-clock Cycle Execution - 32 × 8 General Purpose Working Registers - Fully Static Operation - Up to 16 MIPS Throughput at 16MHz - On-chip 2-cycle Multiplier
- High Endurance Non-volatile Memory segments - 32Kbytes of In-System Self-programmable Flash program memory - 1024Bytes EEPROM - 2Kbytes Internal SRAM - Write/Erase Cycles: 10,000 Flash/100,000 EEPROM - Data retention: 20 years at 85°C/100 years at 25°C(1) - Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation - Programming Lock for Software Security
- JTAG (IEEE std. 1149.1 Compliant) Interface - Boundary-scan Capabilities According to the JTAG Standard - Extensive On-chip Debug Support - Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
- Peripheral Features - Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes - One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode - Real Time Counter with Separate Oscillator - Four PWM Channels - 8-channel, 10-bit ADC 8 Single-ended Channels 7 Differential Channels in TQFP Package Only 2 Differential Channels with Programmable Gain at 1x, 10x, or 200x - Byte-oriented Two-wire Serial Interface - Programmable Serial USART - Master/Slave SPI Serial Interface - Programmable Watchdog Timer with Separate On-chip Oscillator - On-chip Analog Comparator
- Special Microcontroller Features - Power-on Reset and Programmable Brown-out Detection - Internal Calibrated RC Oscillator - External and Internal Interrupt Sources - Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Extended Standby
- I/O and Packages - 32 Programmable I/O Lines - 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF
