SAM9263 Description
The Atmel® | SMART ARM926-based SAM9263 32-bit microprocessor is architectured on a 9-layer matrix, allowing a maximum internal bandwidth of nine 32-bit buses.
SAM9263 Key Features
- ARM926EJ-S™ ARM® Thumb® Processor ̶ DSP Instruction Extensions, Jazelle® Technology for Java® Acceleration ̶ 16 Kbyte Da
- Bus Matrix ̶ Nine 32-bit-layer Matrix, Allowing a Total of 28.8 Gbps of On-chip Bus Bandwidth ̶ Boot Mode Select Option,
- Embedded Memories ̶ One 128 Kbyte Internal ROM, Single-cycle Access at Maximum Bus Matrix Speed ̶ One 80 Kbyte Internal
- Dual External Bus Interface (EBI0 and EBI1) ̶ EBI0 Supports SDRAM, Static Memory, ECC-enabled NAND Flash and pactFlash ̶
- DMA Controller (DMAC) ̶ Acts as one Bus Matrix Master ̶ Embeds 2 Unidirectional Channels with Programmable Priority, Add
- Twenty Peripheral DMA Controller Channels (PDC)
- LCD Controller (LCDC) ̶ Supports Passive or Active Displays ̶ Up to 24 bits per Pixel in TFT Mode, Up to 16 bits per Pix
- Two D Graphics Accelerator ̶ Line Draw, Block Transfer, Clipping, mands Queuing
- Image Sensor Interface ̶ ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate ̶ 12-bit Data Interface f
- USB 2.0 Full Speed (12 Mbits per second) Host Double Port ̶ Dual On-chip Transceivers ̶ Integrated FIFOs and Dedicated D