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ASFLMX-100.000MHz-5ABD - Ultra-Low Phase Jitter HCSL SMD Clock Oscillator

Description

Ref.

Min.

Nom.

Features

  • 100MHz HCSL.
  • Typical phase noise: 100fs (Integration range: 1.875MHz-20MHz).
  • ±50ppm total frequency stability over -40°C to +85°C temperature range.
  • Industry standard 6-Pin 5 x 3.2mm LGA package Pb RoHS/RoHS II compliant 5.0 x 3.2 x 1.4mm.

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Datasheet preview – ASFLMX-100.000MHz-5ABD

Datasheet Details

Part number ASFLMX-100.000MHz-5ABD
Manufacturer Abracon
File Size 6.54 MB
Description Ultra-Low Phase Jitter HCSL SMD Clock Oscillator
Datasheet download datasheet ASFLMX-100.000MHz-5ABD Datasheet
Additional preview pages of the ASFLMX-100.000MHz-5ABD datasheet.

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Full PDF Text Transcription

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Ultra-Low Phase Jitter HCSL SMD Clock Oscillator ASFLMX-100.000MHz-5ABD ESD Sensitive Moisture Sensitivity Level – MSL 3 FEATURES: • 100MHz HCSL • Typical phase noise: 100fs (Integration range: 1.875MHz-20MHz) • ±50ppm total frequency stability over -40°C to +85°C temperature range • Industry standard 6-Pin 5 x 3.2mm LGA package Pb RoHS/RoHS II compliant 5.0 x 3.2 x 1.4mm APPLICATIONS: • PCI-Express • Storage High Performance KEY ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings Item Minimum Maximum Unit Condition Supply Voltage -0.3 +3.6 V Storage Temp. -55 +125 °C Lead Temp.(soldering, 10s) +260 °C ESD (HBM) 2 kV VDD = 2.5V±5% or 3.3V±10%, TA = -40°C to +85°C, outputs terminated with 50 Ohms to VSS.(1) Parameters Minimum Typical Maximum Units Frequency 100.
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