A1010B Overview
A security fuse may be programmed to disable all further programming and to protect the design from being copied or reverse engineered. Product Family Profile Device Capacity Gate Array Equivalent Gates PLD Equivalent Gates TTL Equivalent Packages 20-Pin PAL Equivalent Packages Logic Modules Flip-Flops (maximum) Routing Resources Horizontal Tracks/Channel Vertical Tracks/Column PLICE Antifuse Elements User I/Os...
A1010B Key Features
- 5V and 3.3V Families fully patible with JEDEC specifications
- Up to 2000 Gate Array Gates (6000 PLD equivalent gates)
- Replaces up to 50 TTL Packages
- Replaces up to twenty 20-Pin PAL® Packages
- Design Library with over 250 Macro Functions
- Gate Array Architecture Allows pletely Automatic Place and Route
- Up to 547 Programmable Logic Modules
- Up to 273 Flip-Flops
- Data Rates to 75 MHz
- Two In-Circuit Diagnostic Probe Pins Support Speed Analysis to 25 MHz