Datasheet Summary
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Clock and Wait-State Generation Circuit
Features
- 1.2µ radiation-hardened CMOS
- Latchup immune
- High speed
- Low power consumption
- Single 5-volt supply
- Available QML Q or V processes
- Flexible package
- 14-pin DIP
- 14-lead flatpack DESCRIPTION The UT54ACTS220 is designed to be a panion chip to UTMC’s UT69151 SµMMIT family for the purpose of generating clock and wait-state signals. The device contains a divide by two circuit that accepts TTL input levels and drives CMOS output buffers. The chip accepts a 48MHz clock and generates a 24MHz clock. The 48MHz clock can have a duty cycle that varies by ± 20%. The UT54ACT220 generates a 24MHz clock NC...