A8909CLB Datasheet | Allegro MicroSystems

features digital adaptive mutation delay, programmable digital mutation timers, and minimal micro overhead during startup. This results in enhanced resynchronization during a power fault followed by a restart. D E N U RE N E I T F N E O R C R S I O D F - 11 DATA 12 13 VICMD VM AMUX 14 Dwg. PP-063 A serial peripheral interface provides control of programmable features and mode switches. An onboard dc-to-dc converter provides regulated boost voltage for both the high-side and sink-side gate-drive circuits. This provides for optimal r DS(on) of sources and sinks, regardless of motor supply voltage (5 V or 12 V). The A8909CLB is supplied in a 28-lead low-profile SOIC batwing power package for surface-mount applications. FEATURES s 3 Half-Bridge DMOS Outputs with Low ON Resistance s 5 V Logic Supply, 5 V or 12 V Motor Supply s Back-EMF Sensing and mutation Algorithm with Digital Programmable Timing Functions s Adaptive Adjustable Digital mutation Delay s DC-to-DC Boost Voltage Generator for Source and Sink Gate Drive s PWM Current-Control Loop with Sink-Side Chopping s Transconductance Error Amp. with External pensation for Average Supply Current Control Loop s PWM Oscillator with External Frequency-Setting ponents s Current-Sense Amplifier s Power-Down Brake with Delay Set by External RC s Analog/Digital Multiplexer for Diagnostics and Testing s Thermal Monitor Voltage Available on Multiplexer Micro Systems, Inc. 3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING AND POWER DMOS OUTPUTS s Back-EMF Zero-Crossing Output for Monitoring Motor...