AS7C31026A Datasheet | Alliance Semiconductor Corporation

January 2001 Advance .D a t a S h e e t 4Information U. ® AS7C1026A AS7C31026A 5V/3.3V 64K X 16 CMOS SRAM Features - AS7C1026A (5V version) - AS7C31026A (3.3V version) - Industrial and mercial versions - Organization: 65,536 words × 16 bits - Center power and ground pins for low noise - High speed - 10/12/15/20 ns address access time - 3/3/4/5 ns output enable access time - Latest 6T 0.25u CMOS technology - 2.0V data retention - Easy memory expansion with CE, OE inputs - TTL-patible, three-state I/O - JEDEC standard packaging - 44-pin 400 mil SOJ - 44-pin 400 mil TSOP II - 48-ball 6 mm × 8 mm CSP m BGA - Low power consumption: ACTIVE - 660 m W (AS7C1026A) / max @ 10 ns - 324 m W (AS7C31026A) / max @ 10 ns - ESD protection ≥ 2000 volts - Latch-up current ≥ 200 m A - Low power consumption: STANDBY - 55 m W (AS7C1026A) / max CMOS I/O - 36 m W (AS7C31026A) / max CMOS I/O Logic block...