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AS7C31026B - 3.3V 64K x 16 CMOS SRAM

Key Features

  • Industrial and commercial versions.
  • Organization: 65,536 words × 16 bits.
  • Center power and ground pins for low noise.
  • High speed - 10/12/15/20 ns address access time - 5, 6, 7, 8 ns output enable access time.
  • Low power consumption: ACTIVE - 288 mW / max @ 10 ns.
  • Low power consump.

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Datasheet Details

Part number AS7C31026B
Manufacturer Alliance Semiconductor
File Size 1.34 MB
Description 3.3V 64K x 16 CMOS SRAM
Datasheet download datasheet AS7C31026B Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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AS7C31026B Revision History AS7C31026B Revision Rev 1.0 Rev 1.1 Rev 2.0 Details Initial Issue 10ns TSOP II not offered due to poor yields industrial temp TSOP II not offered due to poor yields refer to 'C' die option for TSOP II. We can still offer in SOJ industrial temp. Date March. 2004 April 2007 August 2009 Please note modified from the original Alliance Semiconductor datasheet by Alliance Memory Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential 1/11 Rev.2.0 Aug.2009 August 2009 AS7C31026B ® 3.