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ASM5P2304A Datasheet 3.3v Zero Delay Buffer

Manufacturer: Alliance Semiconductor Corporation

Overview: September 2005 rev 1.4 .. ASM5P2304A 3.3V Zero Delay Buffer.

General Description

ASM5P2304A is a versatile, 3.3V zero-delay buffer designed to distribute high-speed clocks in PC, workstation, data, tele and other high-performance applications.

It is available in 8 pin package.

The part has an on-chip PLL which locks to an input clock presented on Block Diagram FBK CLKA1 REF PLL CLKA2 /2 Extra Divider (-2) CLKB1 CLKB2 Allian

Key Features

  • Zero input - output propagation delay, adjustable by capacitive load on FBK input. Multiple configurations - Refer “ASM5P2304A Configurations Table”. Input frequency range: 15MHz to 133MHz Multiple low-skew outputs. Output-output skew less than 200pS. Device-device skew less than 500pS. Two banks of four outputs. Less than 200pS Cycle-to-Cycle jitter (-1, -1H, -2, -2H). Available in space saving, 8 pin 150-mil SOIC packages. 3.3V operation. Advanced 0.35< CMOS technology. Industrial temperature.

ASM5P2304A Distributor