AS4C128M16D3C-93BCN Datasheet PDF (128M x 16 bit DDR3 Synchronous DRAM) | Download Alliance Semiconductor AS4C128M16D3C-93BCN

AS4C128M16D3C-93BCN - 128M x 16 bit DDR3 Synchronous DRAM

Features

JEDEC Standard Compliant.
Power supplies: VDD & VDDQ = +1.5V ± 0.075V.
Operating temperature range: (Commercial) - Normal Operating temperature: TC = 0~85°C - Extended temperature: TC = 85~95°C.
Supports JEDEC clock jitter specification.
Fully synchronous operation.
Fast clock rate: 1066MHz.
Differential Clock, CK & CK#.
Bidirectional differential data strobe - DQS & DQS#.
8 internal banks for concurrent operation.
8n-bit prefetch architecture.

Datasheet Details

Part number	AS4C128M16D3C-93BCN
Manufacturer	Alliance Semiconductor
File Size	1.87 MB
Description	128M x 16 bit DDR3 Synchronous DRAM
Datasheet	AS4C128M16D3C-93BCN Datasheet
Additional preview pages of the AS4C128M16D3C-93BCN datasheet.

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Full PDF Text Transcription

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AS4C128M16D3C-93BCN Revision History 2Gb AS4C128M16D3C-93BCN 1.5V 96 ball FBGA Package Revision Rev 1.0 Initial Release Date June.2020 Alliance Memory Inc. 12815 NE 124th Street Suite D,Kirkland WA 98034 USA Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 86 - Rev.1.0 June 2020 AS4C128M16D3C-93BCN 128M x 16 bit DDR3 Synchronous DRAM (SDRAM) Initial Release (Rev. 1.0, Jun. /2020) Features  JEDEC Standard Compliant  Power supplies: VDD & VDDQ = +1.5V ± 0.

Published: Aug 22, 2025 |