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AS4C128M16D3LB-12BIN - 2G DDR3L

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Alliance Semiconductor

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AS4C128M16D3LB-12BIN 2G DDR3L by Alliance Semiconductor - Datasheet Preview — Datasheet preview – AS4C128M16D3LB-12BIN

Datasheet Details

Part number	AS4C128M16D3LB-12BIN
Manufacturer	Alliance Semiconductor
File Size	1.96 MB
Description	2G DDR3L
Datasheet	AS4C128M16D3LB-12BIN Datasheet
Additional preview pages of the AS4C128M16D3LB-12BIN datasheet.

Product details

Features

JEDEC Standard Compliant.
Power supplies: VDD & VDDQ = +1.35V (1.283V ~ 1.45V).
Backward compatible to VDD & VDDQ = +1.5V ±0.075V.
Operating temperature: TC = -40~95°C (Industrial).
Supports JEDEC clock jitter specification.
Fully synchronous operation.
Fast clock rate: 800MHz.
Differential Clock, CK & CK#.
Bidirectional differential data strobe - DQS & DQS#.
8 internal banks for concurrent operation.
8n-bit prefetch architecture.
Pipel.

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Published: Mar 19, 2019 |