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AS4C1M16F5 Datasheet 5v 1m X 16 CMOS Dram

Manufacturer: Alliance Semiconductor

Overview: August 2001 ® AS4C1M16F5 5V 1M×16 CMOS DRAM (fast-page mode).

General Description

42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 VSS DQ16 DQ15 DQ14 DQ13 VSS DQ12 DQ11 DQ10 DQ9 NC LCAS UCAS OE A9 A8 A7 A6 A5 VCC DQ1 DQ2 DQ3 DQ4 VCC DQ5 DQ6 DQ7 DQ8 NC 1 2 3 4 5 6 7 8 9 10 11 50 49 48 47 46 45 44 43 42 41 40 VSS DQ16 DQ15 DQ14 DQ13 VSS DQ12 DQ11 DQ10 DQ9 NC A0 to A9 Address inputs Input/output Row address strobe Output enable Write enable DQ1 to DQ16 OE WE UCAS LCAS Column address strobe, upper byte Column address strobe, lower byte Power Ground NC NC A4 VSS WE RAS NC NC A0 A1 A2 A3 VCC 15 16 17 18 19 20 21 22 23 24 25 36 35 34 33 32 31 30 29 28 27 26 NC LCAS UCAS OE VCC VSS A9 A8 A7 A6 A5 A4 VSS Symbol tRAC tAA tCAC tRC tPC ICC1 ICC5 -45 45 23 10 12 75 20 -50 50 25 -60 60 30 Unit ns ns Maximum output enable (OE) access time Minimum read or write cycle time Minimum fast page mode cycle time Maximum operating current Maximum CMOS standby current tOEA 155 2.0 3/22/02;

v.0.9.2 Alliance Semiconductor m o c 12 15 ns .

13 15 U ns 4 t ns 80 100 e 20 25 e ns h 14

Key Features

  • Organization: 1,048,576 words × 16 bits.
  • High speed - 45/50/60 ns RAS access time - 20/20/25 ns fast page cycle time - 10/12/15 ns CAS access time.
  • Low power consumption - Active: 880 mW max (AS4C1M16F5-60) - Standby: 11 mW max, CMOS DQ.
  • Fast page mode.
  • 1024 refresh cycles, 16 ms refresh interval - RAS-only or CAS-before-RAS refresh.
  • Read-modify-write.
  • TTL-compatible, three-state DQ.
  • JEDEC standard package and pinout - 400.

More Datasheets from Alliance Semiconductor

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AS4C1M16E5 5V 1M x 16 CMOS DRAM
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