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AS4C32M16D2C-25BCN Datasheet 32m X 16 Bit Ddrii Synchronous Dram

Manufacturer: Alliance Semiconductor

Overview: AS4C32M16D2C-25BCN AS4C32M16D2C-25BIN Revision History 512M DDR2 AS4C32M16D2C Revision Details Rev 1.0 Initial release 84ball FBGA PACKAGE Date June. 2022 Confidential -163- Rev.1.0 June 2022 AS4C32M16D2C-25BCN AS4C32M16D2C-25BIN 32M x 16 bit DDRII Synchronous DRAM (SDRAM) Rev. 1.0, June.

Key Features

  • JEDEC Standard Compliant.
  • JEDEC Standard 1.8V I/O (SSTL_18-compatible).
  • Power supplies: VDD & VDDQ = +1.8V 0.1V.
  • Operating temperature: TC = 0~85°C (Commercial) TC = -40~95°C (Industrial).
  • Supports JEDEC clock jitter specification.
  • Fully synchronous operation.
  • Fast clock rate: 400MHz.
  • Differential Clock, CK & CK#.
  • Bidirectional single/differential data strobe - DQS & DQS#.
  • 4 internal banks for concurrent operation.
  • 4-bit prefetch architect.

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