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AS6C62256A - 32K x 8 BIT LOW POWER CMOS SRAM

General Description

transistor cell.

The circuit is activated by the falling edge of E.

Key Features

  • 32768x8 bit static CMOS RAM.
  • Access times 70 ns.
  • Common data inputs and data outputs.
  • Three-state outputs.
  • Typ. operating supply current o 70 ns: 50 mA.
  • TTL/CMOS-compatible.
  • Automatical reduction of power dissipation in long Read Cycles.
  • Power supply voltage 5V + 10%.
  • Operating temperature ranges o 0 to 70 °C o -40 to 85 °C.
  • QS 9000 Quality Standard.
  • ESD protection > 2000 V (MIL STD 883C M3015.7).
  • Latch-up immunity >100 mA.
  • Packa.

📥 Download Datasheet

Datasheet Details

Part number AS6C62256A
Manufacturer Alliance Semiconductor
File Size 593.19 KB
Description 32K x 8 BIT LOW POWER CMOS SRAM
Datasheet download datasheet AS6C62256A Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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  APRIL 2009  AS6C62256A    32K X 8 BIT LOW POWER CMOS SRAM FEATURES   32768x8 bit static CMOS RAM  Access times 70 ns  Common data inputs and data outputs  Three-state outputs  Typ. operating supply current o 70 ns: 50 mA  TTL/CMOS-compatible  Automatical reduction of power dissipation in long Read Cycles  Power supply voltage 5V + 10%  Operating temperature ranges o 0 to 70 °C o -40 to 85 °C  QS 9000 Quality Standard  ESD protection > 2000 V (MIL STD 883C M3015.7)  Latch-up immunity >100 mA  Packages: PDIP28 (600 mil) SOP28 (330 mil) DESCRIPTION  The AS6C62256A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6- transistor cell.