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AS6C8016-55TIN - low power CMOS static random access memory

Description

The AS6C8016-55TIN is a 8,388,608-bit low power CMOS static random access memory organized as 524,288 words by 16 bits.

It is fabricated using very high performance, high reliability CMOS technology.

Its standby current is stable within the range of operating temperature.

Features

  • n.
  • Fast access time : 55ns n.
  • Low power consumption: Operating current : 30/20mA (TYP. ) Standby current : 1.5µA (TYP. ) SL-version n.
  • Single 2.7V ~ 3.6V power supply n.
  • All inputs and outputs TTL compatible n.
  • Fully static operation n.
  • Tri-state output n.
  • Data byte control : LB# (DQ0 ~ DQ7) UB# (DQ8 ~ DQ15) n.
  • Data retention voltage : 1.2V(MIN. ) n.
  • Package : 48-pin 12mm x 20mm TSOP-I n.
  • Green & ROHS Compliant.

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Datasheet preview – AS6C8016-55TIN

Datasheet Details

Part number AS6C8016-55TIN
Manufacturer Alliance Semiconductor
File Size 1.59 MB
Description low power CMOS static random access memory
Datasheet download datasheet AS6C8016-55TIN Datasheet
Additional preview pages of the AS6C8016-55TIN datasheet.

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Full PDF Text Transcription

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AS6C8016-55TIN Revision History List 512K x 16 bit -AS6C8016-55TIN - 48-pin TSOP I PACKAGE Revision Rev. 1.0 Details Initial Issue Date November12.2015 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential -1/11- Rev.1.0 Nov 2015 FEATURES n Fast access time : 55ns n Low power consumption: Operating current : 30/20mA (TYP.) Standby current : 1.5µA (TYP.) SL-version n Single 2.7V ~ 3.6V power supply n All inputs and outputs TTL compatible n Fully static operation n Tri-state output n Data byte control : LB# (DQ0 ~ DQ7) UB# (DQ8 ~ DQ15) n Data retention voltage : 1.2V(MIN.
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