AS7C32096A Description
The AS7C32096A is a high-performance CMOS 2,097,152-bit Static Random Access Memory (SRAM) device organized as 262,144 words × 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 4/5/6/7 ns are ideal for high-performance applications.
AS7C32096A Key Features
- Industrial and mercial temperature
- Organization: 262,144 words × 8 bits
- Center power and ground pins
- High speed
- 10/12/15/20 ns address access time
- 4/5/6/7 ns output enable access time
- Low power consumption: ACTIVE
- 650 mW / max @ 10 ns
- Low power consumption: STANDBY
- 28.8 mW / max CMOS