EP1810 datasheet by Altera.
| Part number | EP1810 |
|---|---|
| Datasheet | EP1810-Altera.pdf |
| File Size | 657.80 KB |
| Manufacturer | Altera |
| Description | EPLD |
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The Altera ClassicTM device family offers a solution to high-speed, lowpower logic integration. Fabricated on advanced CMOS technology, Classic devices also have a Turbo-only version, which is described in this data sheet. Classic devices support 100% TTL emulation and can easily integrate multiple PAL- and GAL-type devices with densities ranging from 300 to 900 usable gates.
| Part Number | Description |
|---|---|
| EP1810EPLD | COMPLEX-EPLD 48-CELL 20NS PROP DELAY |
| EP1800 | 48-Macrocell EPLD |
| EP1C12 | FPGA |
| EP1C20 | FPGA |
| EP1C3 | FPGA |
| EP1C4 | FPGA |
| EP1C6 | FPGA |
| EP1K10 | Programmable Logic Device |
| EP1K100 | Programmable Logic Device |
| EP1K30 | Programmable Logic Device |
