Altera EP1C12
the EP1C3 device in the 144-pin TQFP package and the EP1C6 device in the same package).FEATURES
... The CycloneTM field programmable gate array family is based on a 1.5-V, 0.13-µm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phaselocked loops (PLLs) for clocking and a dedicated double data rate (DDR) interface to meet DDR SDRAM and fast cycle RAM (FCRAM) memory requirements, Cyclone devices are a cost-effective solution for data-path applications. Cyclone devices support various I/O standards, including LVDS at data rates up to 311 megabits per second (Mbps) and 66-MHz, 32-bit peripheral component interconnect (PCI), for interfacing with and supporting ASSP and ASIC devices. Altera also offers new low-cost serial configuration devices to configure Cyclone devices.● 2,910 to 20,060 LEs, see Table 1
● Up to 294,912 RAM bits (36,864 bytes)
● Supports configuration through low-cost serial configuration device
● Support for LVTTL, LVCMOS, SSTL-2, and SSTL-3 I/O standards
● Support for 66-MHz, 3...