EP224 - Classic EPLDs

Altera

Download the EP224 datasheet PDF. This datasheet also covers the EP220 variant, as both devices belong to the same classic eplds family and are provided as variant models within a single manufacturer datasheet.

Key Features

EP220 & EP224 ® Classic EPLDs Data Sheet s High-performance, low-power Erasable Programmable Logic Devices (EPLDs) with 8 macrocells.
Combinatorial speeds as low as 7.5 ns.
Counter frequencies of up to 100 MHz.
Pipelined data rates of up to 115 MHz.
Maximum 5.5-ns Clock-to-output time; minimum 4.5-ns setup time s Replacement or upgrade for 16V8/20V8 PAL and GAL devices s Up to 18 inputs (10 dedicated inputs) in EP220, 22 inputs (14 dedicated inputs) in EP224;.

📥 Download Datasheet

EP224 classic eplds by Altera - Datasheet Preview — Note: The manufacturer provides a single datasheet file (EP220-Altera.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number	EP224
Manufacturer	Altera
File Size	280.25 KB
Description	Classic EPLDs
Datasheet	EP224 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text

May 1995, ver. 1 Features EP220 & EP224 ® Classic EPLDs Data Sheet s High-performance, low-power Erasable Programmable Logic Devices (EPLDs) with 8 macrocells – Combinatorial speeds as low as 7.5 ns – Counter frequencies of up to 100 MHz – Pipelined data rates of up to 115 MHz – Maximum 5.5-ns Clock-to-output time; minimum 4.