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AD14160L - DSP Multiprocessor

Download the AD14160L datasheet PDF. This datasheet also covers the AD14160 variant, as both devices belong to the same dsp multiprocessor family and are provided as variant models within a single manufacturer datasheet.

General Description

The AD14160/AD14160L Quad-SHARC Ceramic Ball Grid Array (CBGA) puts the power of the first generation AD14060 (CQFP) DSP multiprocessor into a very high density ball grid array package; now with additional link and serial I/O pinned out, beyond that from the CQFP package.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (AD14160-AnalogDevices.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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a Quad-SHARC® DSP Multiprocessor Family AD14160/AD14160L PERFORMANCE FEATURES FUNCTIONAL BLOCK DIAGRAM ADSP-21060 Core Processor (. . . ؋4) 480 MFLOPS Peak, 320 MFLOPS Sustained CS TIMEXP LINK 1 LINK 2 LINK 3 LINK 4 IRQ2-0 FLAG3-0 CS TIMEXP LINK 1 LINK 2 LINK 3 LINK 4 IRQ2-0 FLAG3-0 25 ns Instruction Rate, Single-Cycle Instruction Execution–Each of Four Processors ID2-0 CPA LINK 0 LINK 0 ID2-0 EBOOT, LBOOT, BMS EMU CLKIN RESET TCK, TMS, TRST EBOOT, LBOOT, BMS EMU CLKIN RESET TCK, TMS, TRST 16 Mbit Shared SRAM (Internal to SHARCs) 4 Gigawords Addressable Off-Module Memory SPORT 1 SPORT 0 SHARC_A TDI LINK 5 TDO LINK 5 TDI CPA SHARC_B SPORT 1 SPORT 0 Sixteen 40 Mbyte/s Link Ports (Four per SHARC) Eight 40 Mbit/s Independent Serial Ports (Two from Each SHARC) 5 V and 3.